| Issue | Title | |
| Vol 8, No 3: November 2019 | 512 bit-SHA3 design approach and implementation on field programmable gate arrays | Abstract PDF |
| S. Neelima, R. Brindha | ||
| Vol 9, No 1: March 2020 | 6 Transistors and 1 memristor based memory cell | Abstract PDF |
| Kazi Fatima Sharif, Satyendra N. Biswas | ||
| Vol 8, No 3: November 2019 | A body bias technique for low power full adder using XOR gate and pseudo NMOS transistor | Abstract PDF |
| Pritty Pritty, Manoj Kumar, Mariyam Zunairah | ||
| Vol 9, No 1: March 2020 | A compact graphene based nano-antenna for communication in nano-network | Abstract PDF |
| M. Saravanan, V.R. Prakash | ||
| Vol 9, No 1: March 2020 | A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET | Abstract PDF |
| Hind Jaafar, Abdellah Aouaj, Benjamin Iñiguez, Ahmed Bouziane | ||
| Vol 13, No 2: July 2024 | A condition-based distributed approach for secured privacy preservation of nodes in wireless sensor networks IoT | Abstract PDF |
| Bharat Kumara, S. Anantha Padmanabhan | ||
| Vol 10, No 1: March 2021 | A design methodology for approximate multipliers in convolutional neural networks: A case of MNIST | Abstract PDF |
| Kenta Shirane, Takahiro Yamamoto, Hiroyuki Tomiyama | ||
| Vol 5, No 3: November 2016 | A Gracefully Degrading and Energy-Efficient FPGA Programming using LabVIEW | Abstract PDF |
| B. Naresh Kumar Reddy, N. Suresh, J.V.N. Ramesh | ||
| Vol 9, No 2: July 2020 | A hardware system with ARM-based data processing for nano satellites | Abstract PDF |
| Adrián Stacul, Daniel Pastafiglia, Ariel Di Giovanni, Martín Morales, Sergio Saluzzi, Gerardo García, Agustín Gadea, Ramiro Puga | ||
| Vol 12, No 3: November 2023 | A hybrid wrapper spider monkey optimization-simulated annealing model for optimal feature selection | Abstract PDF |
| Bibhuprasad Sahu, Amrutanshu Panigrahi, Bibhu Dash, Pawan Kumar Sharma, Abhilash Pati | ||
| Vol 11, No 2: July 2022 | A laboratory scale IoT-based measuring of the solar photovoltaic parameters | Abstract PDF |
| Arsyad Cahya Subrata, Tole Sutikno, Sunardi Sunardi, Anggit Pamungkas, Watra Arsadiando, Ahmad Raditya Cahya Baswara | ||
| Vol 10, No 3: November 2021 | A low power comparator utilizing MTSCStack, DTTS, and bulk-driven techniques | Abstract PDF |
| Mohd Tafir Mustaffa | ||
| Vol 12, No 3: November 2023 | A new fuzzy rule-based optimization approach for predicting the user behaviour classification in M-commerce | Abstract PDF |
| Muniappan Ramaraj, Jothish Chembath, Balluru Thammaiahshetty Adishankar Nithya, Gnanakumar Ganesan, Balakrishnan Uma Shankari, Nagarajan Karthikeyan | ||
| Vol 4, No 3: November 2015 | A New-High Speed-Low Power-Carry Select Adder Using Modified GDI Technique | Abstract PDF |
| M. Anitha, J.Princy Joice, Rexlin Sheeba.I | ||
| Vol 11, No 1: March 2022 | A novel autonomous remote system applied in agriculture using transmission control protocol | Abstract PDF |
| Anass Deroussi, Abdessalam Ait Madi, Imam Alihamidi, Lalla Amina Charaf, Mohammed Saber, Anass Erraoui, Adnane Addaim | ||
| Vol 13, No 2: July 2024 | A novel compression methodology for medical images using deep learning for high-speed transmission | Abstract PDF |
| Shyamala Navaneethakrishnan, Geetha Shanmugam | ||
| Vol 13, No 2: July 2024 | A novel ensemble deep network framework for scene text recognition | Abstract PDF |
| Sunil Kumar Dasari, Shilpa Mehta, Diana Steffi | ||
| Vol 2, No 2: July 2013 | A Novel Evolutionary Method for Designing Optimized Multifunctional Logic Modules | Abstract PDF |
| Mehdi Anjomshoa, Ali Mahani | ||
| Vol 7, No 2: July 2018 | A Novel Face Recognition Algorithm Using Gabor - based KPCA | Abstract PDF |
| Umasankar Ch, D. Naresh Kumar, Md. Abdul Rawoof, D. Khalandar Basha, N. Madhu | ||
| Vol 1, No 1: March 2012 | A Novel FPGA based Leading One Anticipation Algorithm for Floating Point Arithmetic Units | Abstract PDF |
| Ashwini Suresh Deshmukh | ||
| Vol 1, No 1: March 2012 | A Novel High Speed FPGA Architecture for FIR Filter Design | Abstract PDF |
| Sachin B. Jadhav, Nikhil Niwas Mane | ||
| Vol 12, No 2: July 2023 | A novel reduced instruction set computer-communication processor design using field programmable gate array | Abstract PDF |
| Joseph Anthony Prathap, Sai Ramesh | ||
| Vol 13, No 3: November 2024 | A novel smart irrigation framework with timing allocation using solenoid valves and Arduino microcontroller | Abstract PDF |
| Vijaya Kumar Hemapura Ramakrishnaiah, Harish Lakshmappa, Bharathi Gururaj, Ramesha Muniyappa, Pavan Godekere Siddaramaiah, Nagesh Hunnigere Bylamurthy | ||
| Vol 7, No 2: July 2018 | A Power Efficient Self Biased OTA Design Based on g_m/I_D Methodology with Considering Load Variation, Temperature Variation and Power Supply Variation | Abstract PDF |
| Vikas Mittal | ||
| Vol 8, No 3: November 2019 | A scalable FPGA based accelerator for Tiny-YOLO-v2 using OpenCL | Abstract PDF |
| Yap June Wai, Zulkanain Mohd Yussof, Sani Irwan Md Salim | ||
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International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).