Table of Contents
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Anass Deroussi, Abdessalam Ait Madi, Imam Alihamidi, Lalla Amina Charaf, Mohammed Saber, Anass Erraoui, Adnane Addaim
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1-12
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Joydeep Dey
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13-24
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Mochammad Haldi Widianto, Arief Ramadhan, Agung Trisetyarso, Edi Abdurachman
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25-33
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Anil Kumar, Sanket S Naik Dessai, Shivaprasad Yadav
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34-48
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Hanen Abbes, Hafedh Abid, Kais loukil, Mohamed Abid, Ahmad Toumi
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49-58
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Arif Ullah, Abdu Salam, Hanane El Raoui, Dorsaf Sebai, Mahnaz Rafie
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59-70
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Hameed Pasha Mohammad, H. C. Hadimani, Udara Yedukondalu, Srinivasa Rao Udara
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71-83
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Prabhakar Pujeri, Sanket S. Naik Dessai
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84-92
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An efficient multi-level cache system for geometrically interconnected many-core chip multiprocessor
Tirumale Ramesh, Khalid H Abed
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93-102
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This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).