Ramesh, Tirumale, Jackson State University, United States
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Vol 10, No 2: July 2021 - Other articles
Cost-efficient reconfigurable geometrical bus interconnection system for many-core platforms
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Vol 11, No 1: March 2022 - Other articles
An efficient multi-level cache system for geometrically interconnected many-core chip multiprocessor
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International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).