Central processing unit load reduction through application code optimization and memory management
Abstract
Central processing unit (CPU) loading refers to the amount of processing power a CPU uses to execute a given set of commands or perform an exact task. Higher CPU load can lead to slower, sluggish performance, reduced lifespan, and reduced system stability. Using the CPU Load trace results, the performance bottlenecks can be identified and suitable methods can be adopted to reduce the load on the CPU. For an ideal embedded system, the CPU should be in idle state for around 70% of CPU usage time. In this paper, three types of optimization techniques are implemented, which include application code optimization, memory management, and implementing interrupt-driven data transfer. Application code can be optimized by getting rid of redundant code, duplicate functions and function inlining, function cloning which reduces the size of the code with increase in reusability. By moving the data, variables to data tightly coupled memory (DTCM) and instructions, functions to instruction tightly coupled memory (ITCM), the speed of the CPU increases which reduces the load on CPU. The conventional polling method which increases the CPU load can be reduced by implementing the same in interrupt-driven data transfer. The load on the CPU has reduced from 89.53% to 29.58%.
Keywords
CPU profiling; Data tightly coupled memory; Embedded trace microcell; Instruction tightly coupled memory; Tightly coupled memory
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PDFDOI: http://doi.org/10.11591/ijres.v14.i1.pp79-88
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International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).