New Optimized Reconfigurable ALU Design Based on DG-CNTFET Nanotechnology

Houda Ghabri, Dalenda Ben Issa, Hekmet Samet


The heart of the microprocessor and responsible for the execution of logical and arithmetic operations, the arithmetic and logical unit is constantly optimized. The performance is improved to allow the development of more powerful and smaller circuits. This paper describes simple ALU but contains the essentials functions. It is a reconfigurable ALU based on double-gate carbon nanotube field effect transistor (DG-CNTFETs). This transistor has an interesting property, it can switch from p- to n- type behavior and vice-versa dynamically. This opens the opportunity for building novel and complex functions in fine-grain reconfigurable logic inaccessible to MOSFETs and reaching a good performance levels. In literature there are several problems related to signal quality. In this paper, we will propose a new solution that allows us to improve the quality of the output signal without affecting the number of transistors used. This improves the overall performance of ALU. We will show the improvement in signal level and quality. First, an overview of carbon nanotube field-effect transistor (CNTFET) and state of the art Reconfigurable ALU based on DG-CNTFET is given. Then an explication of signal integrity issues of the actual Reconfigurable DG-CNTFET cell is done. After we will present and explain the proposed solution. The solution is first applied on the cnt_9T circuit then will show its effect on the ALU. Finally, a performance comparison is made.


Ambipolar devices; Dg-cntfet; Optimization technique; Reconfigurable ALU; Reconfigurable logic design.

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International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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