A novel switch pattern algorithm for fault diagnosis in 27-level trinary switched ladder inverter

Abstract

This article proposes a novel switch pattern algorithm for diagnosing switch faults in the 27-level trinary switch ladder multi-level inverter (TSLMLI). The proposed novel switch pattern algorithm is a fusion of the improved counter-based neural network for identifying switch fault occurrence and the synthesizable K-nearest neighbor (KNN) algorithm. The proposed algorithm identifies the switch fault occurrence by making use of the counter-based neural network logic, and the synthesizable KNN algorithm predicts the induced faults based on the inverter parameters, namely total harmonic distortions (THD), root mean square (RMS) voltage, and peak voltage. The trinary switched ladder inverter topology is considered for the fault analysis of the switches due to its merit of attaining high levels with less power switch usage. Though there are several fault diagnoses for power inverters based on signals and models, the proposed fault diagnosis algorithm is data driven, which is fast and precise. This work involves developing switch patterns for the TSLMLI using an angle-based method and concurrently diagnosing the induced faults of the generated switched patterns in the Xilinx Artix 7 field programmable gate array (FPGA) device. The developed algorithm is validated with both electrical and very large scale integration (VLSI) evaluations. Also, the system-on-chip (SoC) design for the proposed algorithm proves the practical feasibility, demonstrating superior hardware acceleration and deterministic real-time execution over traditional microprocessor implementations.