A systematic literature review on hardware implementation of image processing

Zul Imran Azhari, Samsul Setumin, Anis Diyana Rosli, Siti Juliana Abu Bakar


Image processing has become under the spotlight recently and leads to a significant shift in various fields such as biomedical, satellite images, and graphical applications. Nevertheless, the poor quality of an image is one of the noticeable limitations of image processing as it restricts efficient data extraction to be conducted. Conventionally, the image was processed via software applications such as MATLAB. In spite of the software's ability to cater to the data extraction of low-quality image issues, it still suffers from the time-consuming issue. As the ability to obtain a rapid outcome is a favorable feature of efficient image processing, the use of hardware in image processing is deemed to keep the addressed issue at bay. Thus, the image enhancement techniques using hardware have gradually rising interest among researchers with numerous approaches such as field programmable gate array (FPGA). In this study, 25 different research papers published from 2016 to 2021 are studied and analyzed to focus on the performance of FPGA as hardware implementation in image processing techniques.


Field programmable gate array; Hardware implementation; Image enhancement; Image processing; Systematic literature review

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DOI: http://doi.org/10.11591/ijres.v12.i1.pp19-28


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International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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