Mahammad, Masood Ahmad, GITAM Deemed to be University, India
-
Vol 14, No 1: March 2025 - VLSI Design
Performance analysis of parallel prefix adders developed with field programmable gate array technology
Abstract PDF
View the IJRES Visitor Statistics
International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
