Prof. Dr. Daniel Chillet
https://www.scopus.com/authid/detail.uri?authorId=6602070321
University of Rennes, France
Daniel Chillet (M'12) received the Engineering degree, M.S. degree in electronics and signal processing engineering, and the Ph.D. degree in signal processing and telecommunications from University of Rennes 1, Rennes, France, in 1992, 1994, and 1997, respectively, and the habilitation to supervise Ph.D. students in 2010.,He is a member of the Cairn Team, which is an Inria Team located between Lannion and Rennes in France. He is currently an Associate Professor of electrical engineering at the Enssat, engineering school of University of Rennes 1. Since 2010, he has been the Head of the Electronics Engineering Department of ENSSAT. His research interests include memory hierarchy, reconfigurable resources, real-time systems, and middleware. All of these topics are studied in the context of MPSoC design for embedded systems. Low-power design based on reconfigurable systems is one important topic, and spatio-temporal scheduling, memory organization, and operating system services have been previously addressed on several projects.