scopus

Scopus
EXPORT DATE:10 March 2020

Goud V., Padmaja V., "Vehicle accident automatic detection and remote alarm device," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 1, no. 2, cited by 14, 2012.

El Adib S., Raissouni N., "AES Encryption Algorithm Hardware Implementation: Throughput and Area Comparison of 128, 192 and 256-bits Key," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 1, no. 2, cited by 12, 2012. 

Sutikno T., Jidin A.Z., Jidin A., Idris N.R.N., "Simplified VHDL coding of modified non-restoring square root calculator," International Journal of Reconfigurable and Embedded Systems., vol. 1, no. 1, cited by 11, 2012.

Bhople S.S., Gaikwad M.A., "Design of Mesh and Torus Topologies for Network-On-Chip Application," International Journal of Reconfigurable and Embedded Systems, vol. 2, no. 2, cited by 7, 2013.

Saravanan M., Nandakumar R., Veerabalaji G., "Effectual SVPWM Techniques and Implementation of FPGA Based Induction Motor Drive," International Journal of Reconfigurable and Embedded Systems, vol. 1, no. 1, cited by 7, 2012.

Kulkarni R.N., Bhaskar P.C., "Decision based median filter algorithm using resource optimized FPGA to extract impulse noise," International Journal of Reconfigurable and Embedded Systems, vol. 3, no. 1, cited by 6, 2014.

Beldachi A.F., Hosseinabady M., Nunez-Yanez J.L., "Configurable Router Design for Dynamically Reconfigurable Systems based on the socwire noc," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 2, no. 1, cited by 5, 2013.

Sutikno T., Idris N.R.N., Widodo N.S., Jidin A., "Fpga based a pwm technique for permanent magnet ac motor drives," International Journal of Reconfigurable and Embedded Systems, vol. 1, no. 2, cited by 5, 2012.

Nayyar A., "An Encyclopedia Coverage of Compiler’s, Programmer’s & Simulator’s for 8051, PIC, AVR, ARM, Arduino Embedded Technologies," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 5, no. 1, cited by 4, 2016.

Mano R., Kishore Raja P.C., Joseph C., Baskar R., "Hardware Implementation of Intrusion Detection System for Ad-Hoc Network," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 5, no. 3, cited by 3, 2016.

Yusof N.M., Jidin A.Z., Sze L.M., "Web based home security, automation system," International Journal of Reconfigurable and Embedded Systems IJRES, vol. 5, no. 2, cited by 3, 2016.

Dessai S., Mahir M.M., Mayur R., Singha N., Avaradhi V., "Design and development of low cost navigation and security system for Indian fisherman using adrino nano platform," International Journal of Reconfigurable and Embedded Systems, vol. 4, no. 1, cited by 3, 2015.

Dilip P.A., Rameshbabu K., Ashok K.P., Shivdas S.A., "Bilinear Interpolation Image Scaling Processor for VLSI Architecure," International Journal of Reconfigurable and Embedded Systems, vol. 3, no. 3, cited by 3, 2014.

Hasan M.Y., Poornima V.P., Sujendran S., Karthikraja D., "FPGA Based Firewall using Embedded Processor for Vulnarability Packet Detection," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 3, no. 1, cited by 3, 2014.

Mohammad I., Ramananjaneyulu K., "FPGA Implementation of a 64-bit RlSC Processor Using VHDL," Proceedings of International Journal of Reconfigurable and Embedded Systems(IJRES), vol. 1, no. 2, cited by 3, 2012.

Jadhav S.B., Mane N.N., "A novel high speed FPGA architecture for fir filter design," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 1, no. 1, cited by 2, 2012.

Ghabri H., "New optimized reconfigurable Alu design based on DG-CNTFET nanotechnology," International Journal of Reconfigurable and Embedded Systems, vol. 7, no. , cited by 1, 2018.

Mandalapu H., Krishna B.M., "FPGA Implementation of DS-CDMA Transmitter and Receiver," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 6, no. 3, cited by 1, 2017.

Raghav D.B.V., Bandi S.K., "Digitalized electronic voting system," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 5, no. , cited by 1, 2016.

Vinayak Pandit K., Dessai S., Chaudhari S., "Development of bsp for arm9 evaluation board," International Journal of Reconfigurable and Embedded Systems IJRES, vol. 4, no. 3, cited by 1, 2015.

Ru S., Cu P., Baby N., Ru R., "FPGA Synthesis of Reconfigurable Modules for FIR Filter," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 4, no. 2, cited by 1, 2015.

Kannan C., "Nios II based secure test wrapper design for testing cryptographic algorithms," International Journal of Reconfigurable and Embedded Systems, vol. 4, no. , cited by 1, 2015.

Meena N., Parihar N., "Real-Time Algorithms and Architectures for several user Channel Detection in Wireless Base Station Receivers," International Journal of Reconfigurable and Embedded Systems, vol. 4, no. 2, cited by 1, 2015.

Bailmare R.H., Honale S.J., Kinge P.V., "Design and implementation of adaptive fir filter using systolic architecture," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 3, no. 2, cited by 1, 2014.

Kumar M., Nadagouda R.V., Jegan R., "FPGA based multichannel bit error rate tester for spacecraft data acquisition system[J]," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 3, no. 2, cited by 1, 2014.

Manoj Kumar A., Nadagouda R.V., Jegan R., "FPGA based Multichannel Bit Error Rate Tester for Spacecraft Data Acquisition System[J]," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 3, no. 2, cited by 1, 2014.

Anjomshoa M., Mahani A., "A novel evolutionary method for designing optimized multifunctional logic modules," International Journal of Reconfigurable and Embedded Systems, vol. 2, no. 2, cited by 1, 2013.

Patel J., Suthar H., Gadit J., "VHDL Implementation of H.264 Video Coding Standard," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 1, no. 3, cited by 1, 2012.

Ashwini S.D., "A novel FPGA based leading one anticipation algorithm for floating point arithmetic units," International Journal of Reconfigurable and Embedded Systems, vol. 1, no. , cited by 1, 2012.

McDermott M., "QueuedStack Dataflow Processing Element for a Cognitive Sensor Platform," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 1, no. 3, cited by 1, 2012.

Dhekekar R., Srikanth N., "Digital Control of Static Var Compensator with Field Programmable Gate Array[J]," International Journal of Reconfigurable and Embedded Systems (IJRES), vol. 1, no. 3, cited by 1, 2012.

Deshmukh A.S., "A novel FPGA based leading one anticipation algorithm for floating point arithmetic units.'," International Journal of Reconfigurable and Embedded systems, vol. 1, no. 1, cited by 1, 2012.