A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET

Hind Jaafar, Abdellah Aouaj, Benjamin Iñiguez, Ahmed Bouziane

Abstract


A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.

Keywords


DMG-GC-DOT; DMG-GC-DOTTDCD; Drain conductance capacitance; Short channel effects ATLAS (SILVACO); Transconductance

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DOI: http://doi.org/10.11591/ijres.v9.i1.pp34-41

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International Journal of Reconfigurable and Embedded Systems (IJRES)
p-ISSN 2089-4864, e-ISSN 2722-2608
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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