FPGA Evaluation of Reconfigurable Modules With Fault Detection and Repair Technique

Abstract

This paper proposes a fault detection and repair algorithm which is suitable for fault free reconfigurable systems. In recent years Built in Self Repair digital systems have got very important role in the applications such as nuclear systems, space missions and communication systems etc where system reliability is very critical . Systems designed  to operate in critical conditions will collapse due to even a single fault occurrence. To avoid these situations  many methods have developed in recent years. This work proposes an area efficient and fast fault detection and repair algorithm.  For the evaluation of the new approach and older methods a system with a standalone module and four add on modules were designed and evaluated for resource utilization using XUPV5 board. The entire FPGA is divided in to tiles and each module is implemented in different tiles using partial reconfiguration method using Xilinx Plan Ahead 14.2 with partial reconfiguration facility.