FPGA Implementation of DTCWT and PCA Based Watermarking Technique

The hardware implementation of the image watermarking algorithm offers numerous distinct advantages over the software implementation in terms of low power consumption, less area usage and reliability. The advantages of Dual Tree Complex Wavelet Transform (DTCWT) and Principle Component Analysis (PCA) techniques are extracted to improve the robustness and perceptibility. The hardware watermarking solution is more economical, because adding the component only takes up a small dedicated area of silicon. The algorithm is developed and simulated using Matlab, Simulink and system generator. The implementation is carried out using Spartan 6 Diligent Atlys Field Programmable Gate array (FPGA). The architecture uses 256 slice registers, 257 slice Look Up Tables (LUT’s) and 47 I/O pins. It also meets the requirement of high speed architecture with a delay of 1.328ns and an operating frequency of 549.451MHz.


INTRODUCTION
The technology of digital watermarking has gained great success to solve the basic problem of legal ownership and content authentication for digital media such as like image, video, music etc. These problems arise due to advances in internet and computer technology in the recent years. Development in these two technologies coming together provides the tool for unlimited copying of data and share it on internet without any loss in fidelity [1].
Digital watermark is the information signal that contents the owners copyright information to protect the multimedia data. Later, watermark can be extracted from suspected image to verify the ownership identification [2]. The hardware implementation of watermarking offers several distinct advantages over the software implementation in terms of low power consumption, less area usage and reliability [14]. The hardware implementation of is done on custom-designed circuitry either on Application Specific Integrated Circuits (ASICs) or Field Programmable Gate Arrays (FPGA). Its attributes are real time capabilities, compact implementations, power consumption, propagation delay in turn speed and area required.
The main objective of this paper is to describe an invisible, robust, efficient hardware based concept of a digital image watermarking system, with additional features low power consumption, low cost implementation, high processing speed and reliability [14]. The proposed algorithm is based on two techniques DTCWT and PCA. The transform DTCWT is an enhanced version of discrete wavelet transform, which includes the advantage of good directionality, phase information and perfect reconstruction. The PCA is basically used to reduce a complex datasets to a lower dimension. The algorithm has the inherent property

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of removing the correlation amongst the data i.e. the wavelet coefficients and it helps in distributing the watermark bits over the sub-band used for embedding thus resulting in a more robust watermarking scheme that is resistant to almost all possible attacks [3]. The watermark is embedded into the luminance component of the extracted frames as it is less sensitive to the human visual system. The proposed algorithm is designed in Matlab 2013a, Simulink and system generator, Xilinx 14.7. The algorithm is implemented using Spartan6 Digilent Atlys. In this paper section 2 gives review of literature, section 3 explains the watermarking algorithm, section 4 is about architecture of algorithm using simulinkblocks, section 5 gives results and lastly section 6 is conclusion.

LITERATURE SURVEY
Data authentication is one of the most important requirement in present day communication systems.One of the popular technique used in authentication is watermarking techniques. Lim, Hyun et.al has used Discret cosine transform and Least Significant Bit (LSB) technique to design invisible [4] watermarking techniquefor thedigital cameras and it is tested by implementing it on FPGA kit. The watermark is embedded to the image coming out of senser much faster than the software implementation. Tamilvanan et.al adopted DWT and LSB technique to improve the robustness and perceptibility of the watermark technique. This watermarking technique is implemented on FPGA [5]. Sonjob Deb Roy, et.al presents a hardware implementation of a digital watermarking system that can insert invisible, semifragile watermark information into compressed video streams in realtime [6]. The work discusses about the watermark embedding using discrete cosine transform domain which usually consumes high power as it requires larges computations and also results in degradation of the quality. Enas Dhuhri Kusuma and et.al also discusses DCT based image compression using Hardware Descriptive Language (HDL) for hardware application which in turn results in high power consumption [7].
Pankaj U. Lande et.al described water marking algorithm in Discrete Hadamard Transform (DHT) domain [8]. The algorithm was developed using the human visual system (HVS) based on DHT. This technique consumed larger area. Therefor, there is a need of algorithm for high speed applications. The paper also discuss about a DCT/IDCT for digital watermarking in spatial domain. Rajesh Kannan Megalingam et.al describes [9] theimplementation of image watermarking method in the spatial domain and DCT using Matlab, Verilog HDL and FPGA.Peak signal to noise ratio( PSNR) is compared for both domains.
S. Sowmya et.al narrates the FPGA implementation of enhancement techniques during trasmission due to the loss of information. The algorithms were implemented on xc2vp30-7ff896 target device. Number of block Random Access Memory (RAM) required in case of histogram equalization is less as compared to brightness control and contrast stretching. The minimum period in case of all the the implementations is 5.001ns [10]. P Karthigaikumara et.al describes the fragile and semi fragile watermarking techniques and some serious disadvantages like increased use of resources, larger area requirements, and high power consumption. In order to overcome this, robust invisible watermarking technique is used using DWT [11].
Wael Wasfya et.al discusses about the increasing the speed and accuracy for a fast image processing algorithms during computing the image intensity for low level 3x3 algorithmwith different kernel but having the same parallel calculation method is achieved in this work [12]. The paper also explains FPGA is one of the fastest embedded systems that can be used for implementing the fast image processing image algorithms by using DSP slice module inside the FPGA [12]. The advantage of the DSP slice is a faster, accurate, higher number of bits in calculations. Using a higher number of bits during algorithm calculations will lead to a higher accuracy compared with using the same image algorithm calculations with less number of bits, also reducing FPGA resources as minimum as possible.
Mohammad-Reza Keyvanpoura discusses the imporatance of wavelets for watermarking and comparison of various transform domain techniches. This paper discusses the usage of DWT in designing authentication algorithm which fails for different variances and different directionalities. Hence need of wavlets like DTCWT is required to achieve higher degree of freedom [13].

THE IMAGE WATERMARKING ALGORITHM
The proposed watermarking is developed using transform based domain technique. In transform domain the transform coefficients are modified rather than the pixel value. To detect watermark, Inverse transform is used. The DTCWT is the transform domain used in this work. The principle component algorithm, LSB techniques are used to embed the watermark signal [3]. The embedding and extraction algorithm is shown in Figure 1. LaLa sub band coefficients. d. Least significant bit technique is used to embed the watermark signal in host image. e. The watermarked image can be extracted using extraction algorithm which is a reverse process of embedding [3]. Peceptibility is checked by calculating peak signal to noise ratio between original host image and the watermarked image. The extracted watermarks can be compared with original watermark subjectively. Beside subjectively judgment for the watermark fidelity, we have defined an objective measure of similarity between the original watermark and the extracted watermark.
For instance applying any image processing operation to the watermarked image that performs low pass filtering (compression, resizing), will result in loss of multiscale DT-CWT coefficients in higher frequency bands of the watermark. In this case, multiscale DT-CWT coefficients in lower frequency sub bands to be used to determine whether suspected image contains watermarks. The signals are usually embedded into the perceptually important components of the host image to achieve a balance of perceptual quality and Robustness.

DTCWT Computation
Dual-tree complex discrete wavelet transform (DTCWT) provides advantages over the critically sampled DWT for signal, image, and video processing. The DTCWT is one of the most promising decompositions that has an advantage of good directionality, phase information, perfect reconstruction and limited redundancy. The drawbacks of DWT is satisfactorily removed in the dual-tree complex wavelet transform (DTCWT) [3]. Two classical wavelet trees (with real filters) are developed in parallel, with the wavelets forming (approximate) Hilbert pairs. One can then interpret the wavelets in the two trees of the DTCWT as the real and imaginary parts of some complex wavelet. The requirement for the dual-tree setting for forming Hilbert transform pairs is the well-known half sample delay condition. The resulting complex wavelet is then approximately analytic (i.e. approximately one sided in the frequency domain).It has the ability to differentiate positive andnegative frequencies.It produces six subbands oriented in ±15, ±45, ±75. Figure 2 shows the DTCWT decomposition of two trees which consists of real and imaginary parts. The Matlab simulation of 1-level DTCWT is shown in Figure 3. The information is available at LaLa band and remaining sub bands has high frequency component. Since human eyes are not sensitive to small change in the edges and the textures of the image, LaLa subband is selected to embed watermark signal efficiently and invisibility of the watermark is kept at low resolution.

ARCHITECTURE OF THE WATERMARKING ALGORITHMS.
The Designed and simulated watermarked algorithm using MATLAB is implemented on the Spartan 6 Diligent Atlys FPGA kit to check the area required, speed and power consumption. The VHDL and Verilog code can be automatically generated for Xilinx FPGAs from MATLAB using HDL Coder, Simulink, and Stateflow models.HDL Coder supports code generation for Simulink models constructed with a combination of blocks from Simulink and Xilinx-specific block sets from system generator. The system generator Subsystem block in HDL coder enables to include models built with system generator in Simulink as subsystems. HDL Coder uses system generator to generate code from the subsystem blocks and integrates the complete design into synthesizeable HDL.

Watermark Embedding and Extraction System
Simulink model of a watermark embedding and extraction system is shown in Figure 4. Import host and watermark images of any size. The color space conversion converts the input values from the R'G'B' color space to intensity. These two images are resized to smaller dimensions to make the the processing easier and resizing technique used here is bilinear interpolation. The resized output is padded with constant values to improve the resolution of the image. The preprocessing includes transposing, 2D to 1D conversion, frame conversion and then unbuffer or convert to scalar sample output at higher rate.

The DTCWT computation Model.
The DTCWT is performed after pre processingon host and watermark image Figure 5 shows simulink model of DTCWT .Each subsystem uses real DTCWT 1st level co-efficient real (tree a) and imaginary (tree b) parts. Real and imaginary parts of DTCWT form a quadrature pair. Subsystem1 and subsystem 2 process the co efficient through 2nd level DTCWT coefficients generated is shown in the Figure  4.Each subsystem uses real DTCWT 1st level co-efficient real (tree a) and imaginary (tree b) parts. Real and imaginary parts of DTCWT form a quadrature pair. Subsystem1 and subsystem 2 process the co efficient through 2nd level DTCWT coefficients.

The IDTCWT computation Model
The extraction algorithm includes reverse process of embedding.Inverse DTCWT is used to extract the watermark from host image. Figure 6 shows simulink model of IDTCWT and extraction algorithm. Proposed algorithm based IDTCWT provide better features using low pass and high pass analytic filters.

EXPERIMENTAL RESULTS.
The implementation is carried out using simulink, system generator and Spartan 6 Digilent Atlys. To view the images simulink models are simulated results are displayed in 5.1.HDL coder will convert Matlab code to Verilog HDL code and then implemented on Digilent Atlys .Reports of this implementation gives speed, power consumption and area required, this information is displayed in section 5.2

Proposed Architecture is Designed Using Matlab, Simulink and System Generator
The designed simulink model for watermark embedding and extraction algorithm is simulated and results are shown below. The video viewer display of host image, watermark image, embedded image and extracted image are shown Figures 6-9 respectively.

The FPGA Implementation Results
Proposed work is also designed using Verilog using Spartan 6 XC6SLX45 Digilent Atlys. HDL coder generates VHDL or Verilog code. The RTL (Register Transfer block) block of watermarking system is shown in Figure 10. The LUT's of the RTL block are shown in Figure 11.  Figure 13 show device summaries, timming summary of watermarking system respectively. Device summary reveals area occupied by the watermarking system. Timming summary gives information about clock period that is 1.82ns, operating frequency 549.451MHz and delay of 1.32ns. Figure  14 shows power consumption report. Total power is sumof dynamic and qucient power. This system requires 0.004w dynamic and 0.036 quicent power for the image of 128x128.